Two-dimensional (2D) material
A crystal so thin that it is only one or a few atoms thick – a sheet rather than a lump. Graphene, a single layer of carbon atoms, is the best-known example: about 300,000 of its layers stacked up would be as thick as one sheet of paper. At that thickness a material can conduct, glow or respond to magnetism quite differently from the same substance in bulk.
A crystalline material whose thickness is one or a few unit cells, so that electrons, phonons and other excitations are confined in one direction. Most are obtained from layered bulk crystals in which strong in-plane bonds coexist with weak van der Waals bonding between layers.
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Complementary metal–oxide–semiconductor (CMOS)
The way almost every digital chip is built. Each logic gate pairs a transistor that conducts with electrons with one that conducts with holes, so one of the two is always off and the gate draws almost no current except while it switches. A 2D material becomes useful for logic only if both kinds of transistor can be made from it, or if it can be added to a silicon chip without harming it.
Logic in which n- and p-channel field-effect transistors are wired in series between supply and ground, so that in either stable state one of them is off and static power is set by leakage alone. It demands n- and p-type devices of comparable drive, threshold voltages held within tens of millivolts across a wafer, and a process compatible with the silicon line – about 400 °C at most for back-end-of-line integration. For 2D channels the p-type half is the harder one: most TMDCs conduct n-type with common contact metals, and WSe2 is the leading p-type candidate.
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Field-effect transistor (FET)
The electronic switch at the heart of every chip. It works like a tap: a voltage on one terminal, the gate, opens or closes a channel through which current flows. Researchers test new 2D materials by making them into the channel of such a switch.
A three-terminal device in which a gate voltage modulates the carrier density of a semiconductor channel between source and drain through a thin dielectric. For 2D channels the key figures of merit are on/off ratio, subthreshold swing, mobility, contact resistance, hysteresis and threshold-voltage variability.
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Fermi-level pinning
When the junction between a metal and a semiconductor behaves the same whichever metal is used. The choice of metal ought to set the height of the energy step electrons must climb to get into the semiconductor, but stray electron states at the interface take up charge and hold the step at much the same height every time. It makes low-resistance contacts hard to engineer.
The fixing of the Fermi level at a metal–semiconductor interface by interface states, so the Schottky barrier barely depends on the metal work function.
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Semiconductor
A material whose ability to carry electricity can be switched on and off, for example by an applied voltage. That switching is what every transistor in a computer chip relies on. Silicon is the classic example; several 2D materials, such as MoS2 , are semiconductors too.
A material with a band gap of a few electronvolts or less, whose conductivity can be tuned over many orders of magnitude by doping, gating, temperature or light. 2D semiconductors attract interest because their sub-nanometre thickness preserves electrostatic gate control in very short channels.
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Fermi level
Roughly, the energy up to which a material’s electron states are filled – like the water line in a partly filled glass. Where it sits relative to the band gap decides how many charges can move and whether they are electrons or holes, the empty places electrons leave behind. A gate voltage raises and lowers it, like pouring water in or out.
The electrochemical potential of electrons: the energy at which a state has 50 % occupation in thermal equilibrium. Its position relative to the band edges sets carrier density and type; at metal–semiconductor contacts, interface states can pin it and fix the Schottky barrier.
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Monolayer
One single layer of a layered material. Two stacked layers are a bilayer; a handful are called few-layer. Many properties change between one, two and several layers, so the exact count matters.
A single structural layer of a layered crystal – one atom thick for graphene and hBN, three atomic planes for a TMDC such as MoS2 . Band structure, screening and symmetry depend on layer number (monolayer 2H-MoS2 lacks the inversion symmetry of the bilayer), so monolayer, bilayer and few-layer samples are distinct systems.
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Doping
Adding a small amount of extra electrons to a material, or taking some away to leave ‘holes’ that act as positive charges, to change how well it conducts. In silicon this is done by mixing in foreign atoms; in 2D materials it can also be done with a nearby voltage, molecules on the surface, or the material underneath.
Control of carrier type and density by substitutional impurities, surface charge transfer, electrostatic gating or the dielectric environment. Stable, spatially localised substitutional doping remains difficult in 2D semiconductors, and surface-transfer doping is often unstable in air.
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Polytype
One of several ways the same layered compound can arrange or stack its atoms. The chemistry is identical, yet one arrangement may be a semiconductor and another a metal.
One of several stacking or coordination variants of the same layered compound, e.g. 1H/2H, 3R, 1T and 1T′ TMDCs.
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Van der Waals force
A weak attraction between neighbouring atoms and molecules – strong enough, added up over millions of tiny hairs, to let a gecko walk up a pane of glass. In layered crystals it is what holds the layers together, and it is weak enough that a single layer can be peeled off, which is how many 2D materials are made from ordinary crystals.
The weak, non-directional attraction arising from correlated charge fluctuations (dispersion) and related dipolar terms. In layered crystals it binds adjacent layers with energies of tens of meV per atom, roughly two orders of magnitude below in-plane covalent bonds, which enables exfoliation and the free stacking of dissimilar layers.
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Layer transfer
Moving an atomically thin layer from where it was made to where it is needed – from the copper foil it grew on to a silicon wafer, or from a flake on tape onto another flake. The layer is too thin to pick up on its own, so it is carried on a polymer film or a soft stamp, put down, and the carrier removed. Each step risks tears, wrinkles, trapped bubbles and a film of leftover polymer, which is why transfer is often the dirtiest step in making a 2D device.
The step that moves a 2D layer from its growth substrate or exfoliation source to a target substrate or stack. Wet transfer coats the layer with a supporting polymer, usually PMMA, detaches it by etching the growth substrate or by electrochemical bubbling, and floats it onto the target before the polymer is dissolved. Dry transfer picks layers up with a viscoelastic PDMS stamp or a polymer film such as polycarbonate, often using the van der Waals adhesion of a top flake, and releases them by heating. The costs are cracks and wrinkles, trapped water, hydrocarbons and polymer residue, strain and doping, and – at wafer scale – yield that compounds with every transfer, which is why growth directly on the target and transfer-free routes are pursued.
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Etching
Removing material on purpose, with a chemical or a plasma. In chip-making it carves patterns: a stencil of light-sensitive polymer protects some areas while a plasma eats away the rest. For 2D materials etching has three jobs: cutting flakes into shaped devices, thinning a crystal one layer at a time, and – for MXenes – making the material in the first place, by dissolving one kind of atom out of a layered ceramic so that the remaining sheets come apart.
Material removal by chemical reaction in a liquid (wet etching) or by reactive and physical processes in a plasma (dry etching, including reactive ion etching with oxygen-, fluorine- or chlorine-based chemistries, and atomic layer etching). For 2D materials it patterns channels and Hall bars through resist masks – oxygen plasma for graphene, fluorine-based plasmas for hBN and TMDCs – exposes edges in encapsulated stacks for edge contacts, thins crystals layer by layer, and selectively removes the A element, usually aluminium, from MAX phases with hydrofluoric acid or fluoride-containing acids to make MXenes. Its side effects are edge roughness and damage, residues, doping and plasma-induced defects in neighbouring layers, so the etched edge and its electronic states have to be considered in narrow devices.
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Transfer length method (TLM)
A measurement that separates the resistance of a device’s contacts from the resistance of the material itself, by comparing devices with channels of different lengths and working out what would be left at zero length – much as weighing a jar with different amounts of jam in it reveals the weight of the empty jar.
Measuring resistance across channels of different lengths to separate contact resistance from channel resistance.
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Resistivity and sheet resistance
Two ways to put a number on how strongly a material resists a current. Resistivity belongs to the material itself, whatever the size of the piece: copper’s is tiny, glass’s enormous. For a sheet so thin that its thickness is hard to pin down, the sheet resistance is used instead: the resistance of a square of it, measured from one edge to the opposite one, which comes out the same for a square of any size. It is quoted in ohms per square.
Resistivity ρ relates electric field to current density, in Ω·m or Ω·cm, so that a bar of length L and cross-section A has resistance ρL/A. For a film of thickness t the sheet resistance is ρ/t, quoted in Ω per square, and a strip L long and W wide has the sheet resistance times L/W. For an atomically thin layer it is the natural quantity, since the thickness is a convention, and it equals 1/neμ for sheet density n and mobility μ. Both are measured with four probes – a Hall bar, a collinear four-point probe or the van der Pauw method for arbitrary shapes – so that the voltage is sensed away from the current contacts and the contact resistance drops out.
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Gating
Changing a material by putting a voltage on a nearby electrode – a gate – separated from it by an insulator. The voltage pulls electrons into the material or pushes them out, as in every transistor. Because a 2D material is so thin, the gate reaches all of it, so the number of electrons can be dialled up and down continuously: a single device can be turned from insulator to metal, its magnetism strengthened, or superconductivity switched on. Two gates, above and below, can also apply an electric field across the layer.
Electrostatic control of carrier density and electric field through a gate coupled capacitively across a dielectric: the induced density equals the gate capacitance times the voltage beyond threshold, divided by the electron charge, reaching a few 1013 cm−2 with oxide or hBN gates before breakdown. Dual gating sets density and perpendicular displacement field independently, opening the gap of bilayer graphene and tuning moiré flat bands. Ionic-liquid and solid-electrolyte gating form an electric double layer about a nanometre thick and reach 1014 –1015 cm−2 , enough to induce superconductivity in MoS2 or raise the Curie temperature of Fe3 GeTe2 , but can intercalate or react electrochemically and work only while the ions are mobile. Hysteresis from traps, contact effects and quantum capacitance are the usual caveats.
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